Bo Fang, Jiesheng Wei, Karthik Pattabiraman and Matei Ripeanu,
Workshop on Error Resilient Architectures (WRA), held in conjunction with Micro 2012. [ PDF File | Talk Slides ]
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Tag Archives: detectors
Towards Building Error Resilient GPGPU Applications
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Automated Derivation of Application-specific Error Detectors Using Dynamic Analysis
Karthik Pattabiraman, Giacinto Paulo Saggese, Daniel Chen, Zbigniew Kalbarczyk and Ravishankar Iyer, IEEE Transactions on Dependable and Secure Computing (TDSC) Vol 8., Issue 5, Sept/Oct 2011 . [ PDF File ]
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Automated Derivation and Hardware Implementation of Application-Specific Error Detectors
Karthik Pattabiraman, Giacinto Paolo Saggese, Daniel Chen, Zbigniew Kalbarczyk and Ravishankar Iyer, Workshop on Reliability Issues in High-Performance Computing (HPCRI), 2006.
[ PDF File | Talk ]
Super-ceded by the following conference paper.
Abstract: This paper proposes a novel technique for automated derivation of fine-grained, application-specific error detectors. An algorithm based on dynamic traces of application execution is developed for extracting the optimal set of error detectors for a target application. An automatic framework is proposed for synthesizing the derived detectors in hardware and enabling low-overhead run-time checking of the application execution. Coverage (evaluated using fault injection) of the error detectors obtained using the proposed methodology, the additional hardware resources, and performance overhead for several benchmark programs are also reported.
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Critical Variable Recomputation for Transient Error Detection
Karthik Pattabiraman, Zbigniew Kalbarcyk and Ravishankar Iyer, Workshop on Silicon Errors in Logic – System Effects (SELSE), 2007.
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This paper is super-ceded by the following conference paper
Abstract: This paper presents a technique to derive and implement error detectors to protect an application from data errors. The error detectors are derived automatically using compiler-based static analysis from the backward program slice of critical variables in the program. Critical variables are defined as those that are highly sensitive to errors, and deriving error detectors for these variables provides high coverage for errors in any data value used in the program. The error detectors take the form of checking expressions and are optimized for each control flow path followed at runtime. The derived detectors are implemented using a combination of hardware and software.
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Toward Application-aware Security and Reliability
Ravishankar Iyer, Zbigniew Kalbarczyk, Karthik Pattabiraman, William Healey, Wen-Mei Hwu, Peter Klemperer and Reza Farivar, IEEE Security and Privacy Magazine, January 2007 (Invited). [ PDF File ]
No abstract is available.
Here is a news article in the Chicago Tribune that describes this work.
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Processor-Level Selective Replication
Nithin Nakka, Karthik Pattabiraman and Ravishankar Iyer, Proceedings of the International Conference on Dependable Systems and Networks (DSN), 2007.
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Abstract: Full duplication of an entire application (through spatial or temporal redundancy) would detect many errors that are benign to the application from the perspective of the end-user. It has also been seen that duplication has upto 30% performance overhead and needs significant introduction of hardware to synchronize the replicas. In order to overcome the drawbacks of performance overhead and detection of “benign” faults, we propose a processor-level technique called Selective Replication, which provides the application the capability to choose where in its application stream and to what degree it requires replication. Recent work on static analysis and fault-injection based experiments on applications reveals that certain variables in the application are critical to its crash- and hang-free execution. If it can be ensured that the computation of these variables is error-free, then a high degree of crash/hang coverage can be achieved at a low performance overhead to the application. The Selective Replication technique provides an ideal platform for validating this claim. The technique is compared against complete duplication as provided in current architectural level techniques. The results show that with about 59% less overhead than full duplication selective replication detects 97% of the data errors and 87% of the instruction errors that were covered by full duplication. It also reduces the detection of errors benign to the final outcome of the application by 17.8% as compared to full duplication.
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Application-based Metrics for Strategic Placement of Detectors
Karthik Pattabiraman, Zbigniew Kalbarczyk and Ravishankar K. Iyer, Proceedings of the International Symposium on Pacific-Rim Dependable Computing (PRDC), 2005.
[ PDF File | Talk ]
Abstract: The goal of this study is to provide low-latency detection and prevent error propagation due to value errors. This paper introduces metrics to guide the strategic placement of detectors and evaluates (using fault injection) the coverage provided by ideal detectors embedded at program locations selected using the computed metrics. The computation is represented in the form of a Dynamic Dependence Graph (DDG), a directed-acyclic graph that captures the dynamic dependencies among the values produced during the course of program execution. The DDG is employed to model error propagation in the program and to derive metrics (e.g., value fanout or lifetime) for detector placement. The coverage of the detectors placed is evaluated using fault injections in real programs, including two large SPEC95 integer benchmarks (gcc and perl). Results show that a small number of detectors, strategically placed, can achieve a high degree of detection coverage.
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Dynamic Derivation of Application-specific Error Detectors and their Hardware Implementation
Karthik Pattabiraman, Giacinto Paulo Saggese, Daniel Chen, Zbigniew Kalbarczyk and Ravishankar Iyer, Proceedings of the European Dependable Computing Conference (EDCC), 2006. [ PDF File | Talk ]
Abstract: This paper proposes a novel technique for preventing a wide range of data errors from corrupting the execution of applications. The proposed technique enables automated derivation of fine-grained, application-specific error detectors. An algorithm based on dynamic traces of application execution is developed for extracting the set of error detector classes, parameters, and locations in order to maximize the error detection coverage for a target application. The paper also presents an automatic framework for synthesizing the set of detectors in hardware to enable low-overhead run-time checking of the application execution. Coverage (evaluated using fault injection) of the error detectors derived using the proposed methodology, the additional hardware resources needed, and performance overhead for several benchmark programs are also reported.
This paper is super-ceded by the following journal paper.
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Automated Derivation of Application-aware Error Detectors using Static Analysis
Karthik Pattabiraman, Zbigniew Kalbarczyk and Ravishankar Iyer, Proceedings of the IEEE International Online Testing Symposium (IOLTS), 2007. [ PDF File | Talk ]
Abstract: This paper presents a technique to derive and implement error detectors to protect an application from data errors. The error detectors are derived automatically using compiler-based static analysis from the backward program slice of critical variables in the program. Critical variables are defined as those that are highly sensitive to errors, and deriving error detectors for these variables provides high coverage for errors in any data value used in the program. The error detectors take the form of checking expressions and are optimized for each control flow path followed at runtime. The derived detectors are implemented using a combination of hardware and software.Experiments show that the derived detectors incur low performance overheads while achieving high detection coverage for errors that impact the application.
This paper is superceded by the following journal paper.
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Automated Derivation of Application-aware Error Detectors using Static Analysis: The Trusted Illiac Approach
Karthik Pattabiraman, Zbigniew Kalbarczyk and Ravishankar Iyer. To appear in the Proceedings of the IEEE Transactions on Dependable and Secure Computing (TDSC). (Accepted on May 1, 2009). [ PDF File ]
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